P2 LFSR

P2/main.py

@@ -0,0 +1,65 @@
+# Linear Feedback Shift Register
+class LFSR:
+    def __init__(self, poly):
+        self.g = []     # mapping von g g[x] == g_x
+        self.reg = []   # Register mit dem Zustand
+
+        for ziffer in poly:
+            self.reg.append(0)
+            self.g.append(int(ziffer))
+
+        # poly = str(n, n-1, ..., 0) => g = [0, ..., n-1, n]
+        self.g.reverse()
+        self.reg.reverse()
+
+        # Entferne den letzten Eintrag, da dieser den Grad darstellt => Anzahl der Register = len(g) - 1
+        self.g.pop()
+        self.reg.pop()
+
+
+    def get_reg_as_string(self):
+        reg_string = ""
+
+        for i in self.reg:
+            reg_string = reg_string + str(i)
+
+        return reg_string
+
+    def shift(self, s_i):
+        reg_old = self.reg.copy()           # alter Zustand, um überschreibungen zu vermeiden
+
+        feedback = reg_old[-1] ^ int(s_i)
+
+        for i, value in enumerate(self.g):
+            if i == 0:
+                self.reg[i] = feedback
+            else:
+                if value == 1:
+                    self.reg[i] = reg_old[i - 1] ^ feedback
+                else:
+                    self.reg[i] = reg_old[i - 1]
+
+
+def CRC_Parity(daten, g):
+    schiebe_reg = LFSR(g)
+
+    for s in daten:
+        schiebe_reg.shift(s)
+
+    return schiebe_reg.get_reg_as_string()
+
+
+def channel_bsc(p, n):
+    F = 0b0
+    '''
+    berechne Fehlersequenz F
+    Achte auf Bedingung
+    '''
+    return F
+
+
+def p_k_Fehler(p):
+    n = 1000
+
+
+def main():

Ue6.circ

@@ -0,0 +1,166 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<project source="3.9.0" version="1.0">
+  This file is intended to be loaded by Logisim-evolution v3.9.0(https://github.com/logisim-evolution/).
+
+  <lib desc="#Wiring" name="0">
+    <tool name="Pin">
+      <a name="appearance" val="classic"/>
+    </tool>
+  </lib>
+  <lib desc="#Gates" name="1"/>
+  <lib desc="#Plexers" name="2"/>
+  <lib desc="#Arithmetic" name="3"/>
+  <lib desc="#Memory" name="4"/>
+  <lib desc="#I/O" name="5"/>
+  <lib desc="#TTL" name="6"/>
+  <lib desc="#TCL" name="7"/>
+  <lib desc="#Base" name="8"/>
+  <lib desc="#BFH-Praktika" name="9"/>
+  <lib desc="#Input/Output-Extra" name="10"/>
+  <lib desc="#Soc" name="11"/>
+  <main name="main"/>
+  <options>
+    <a name="gateUndefined" val="ignore"/>
+    <a name="simlimit" val="1000"/>
+    <a name="simrand" val="0"/>
+  </options>
+  <mappings>
+    <tool lib="8" map="Button2" name="Poke Tool"/>
+    <tool lib="8" map="Button3" name="Menu Tool"/>
+    <tool lib="8" map="Ctrl Button1" name="Menu Tool"/>
+  </mappings>
+  <toolbar>
+    <tool lib="8" name="Poke Tool"/>
+    <tool lib="8" name="Edit Tool"/>
+    <tool lib="8" name="Wiring Tool"/>
+    <tool lib="8" name="Text Tool"/>
+    <sep/>
+    <tool lib="0" name="Pin"/>
+    <tool lib="0" name="Pin">
+      <a name="facing" val="west"/>
+      <a name="output" val="true"/>
+    </tool>
+    <sep/>
+    <tool lib="1" name="NOT Gate"/>
+    <tool lib="1" name="AND Gate"/>
+    <tool lib="1" name="OR Gate"/>
+    <tool lib="1" name="XOR Gate"/>
+    <tool lib="1" name="NAND Gate"/>
+    <tool lib="1" name="NOR Gate"/>
+    <sep/>
+    <tool lib="4" name="D Flip-Flop"/>
+    <tool lib="4" name="Register"/>
+  </toolbar>
+  <circuit name="main">
+    <a name="appearance" val="logisim_evolution"/>
+    <a name="circuit" val="main"/>
+    <a name="circuitnamedboxfixedsize" val="true"/>
+    <a name="simulationFrequency" val="1.0"/>
+    <comp lib="0" loc="(380,470)" name="Clock">
+      <a name="labelloc" val="north"/>
+    </comp>
+    <comp lib="0" loc="(540,450)" name="Pin">
+      <a name="appearance" val="NewPins"/>
+    </comp>
+    <comp lib="1" loc="(590,370)" name="XOR Gate">
+      <a name="size" val="30"/>
+    </comp>
+    <comp lib="1" loc="(860,380)" name="XOR Gate">
+      <a name="size" val="30"/>
+    </comp>
+    <comp lib="4" loc="(410,360)" name="D Flip-Flop">
+      <a name="appearance" val="logisim_evolution"/>
+    </comp>
+    <comp lib="4" loc="(480,360)" name="D Flip-Flop">
+      <a name="appearance" val="logisim_evolution"/>
+    </comp>
+    <comp lib="4" loc="(570,460)" name="Shift Register">
+      <a name="appearance" val="classic"/>
+      <a name="length" val="20"/>
+    </comp>
+    <comp lib="4" loc="(610,360)" name="D Flip-Flop">
+      <a name="appearance" val="logisim_evolution"/>
+    </comp>
+    <comp lib="4" loc="(680,360)" name="D Flip-Flop">
+      <a name="appearance" val="logisim_evolution"/>
+    </comp>
+    <comp lib="4" loc="(750,360)" name="D Flip-Flop">
+      <a name="appearance" val="logisim_evolution"/>
+    </comp>
+    <comp lib="8" loc="(400,305)" name="Text">
+      <a name="font" val="SansSerif italic 16"/>
+      <a name="text" val="g0"/>
+    </comp>
+    <comp lib="8" loc="(430,350)" name="Text">
+      <a name="text" val="p0"/>
+    </comp>
+    <comp lib="8" loc="(495,350)" name="Text">
+      <a name="text" val="p1"/>
+    </comp>
+    <comp lib="8" loc="(540,305)" name="Text">
+      <a name="font" val="SansSerif italic 16"/>
+      <a name="text" val="g2"/>
+    </comp>
+    <comp lib="8" loc="(630,350)" name="Text">
+      <a name="text" val="p2"/>
+    </comp>
+    <comp lib="8" loc="(675,515)" name="Text">
+      <a name="text" val="c_0, ..., c_19"/>
+    </comp>
+    <comp lib="8" loc="(685,495)" name="Text">
+      <a name="font" val="SansSerif plain 16"/>
+      <a name="text" val="11101110011101100101"/>
+    </comp>
+    <comp lib="8" loc="(700,350)" name="Text">
+      <a name="text" val="p3"/>
+    </comp>
+    <comp lib="8" loc="(770,345)" name="Text">
+      <a name="text" val="p4"/>
+    </comp>
+    <comp lib="8" loc="(870,305)" name="Text">
+      <a name="font" val="SansSerif italic 16"/>
+      <a name="text" val="g5"/>
+    </comp>
+    <wire from="(380,470)" to="(390,470)"/>
+    <wire from="(390,320)" to="(390,370)"/>
+    <wire from="(390,320)" to="(460,320)"/>
+    <wire from="(390,370)" to="(400,370)"/>
+    <wire from="(390,410)" to="(390,430)"/>
+    <wire from="(390,410)" to="(400,410)"/>
+    <wire from="(390,430)" to="(390,470)"/>
+    <wire from="(390,430)" to="(470,430)"/>
+    <wire from="(390,470)" to="(570,470)"/>
+    <wire from="(460,320)" to="(460,330)"/>
+    <wire from="(460,320)" to="(540,320)"/>
+    <wire from="(460,370)" to="(470,370)"/>
+    <wire from="(470,410)" to="(470,430)"/>
+    <wire from="(470,430)" to="(600,430)"/>
+    <wire from="(530,370)" to="(540,370)"/>
+    <wire from="(540,320)" to="(540,360)"/>
+    <wire from="(540,320)" to="(660,320)"/>
+    <wire from="(540,360)" to="(550,360)"/>
+    <wire from="(540,370)" to="(540,380)"/>
+    <wire from="(540,380)" to="(550,380)"/>
+    <wire from="(540,450)" to="(550,450)"/>
+    <wire from="(550,450)" to="(550,460)"/>
+    <wire from="(550,460)" to="(570,460)"/>
+    <wire from="(590,370)" to="(600,370)"/>
+    <wire from="(600,410)" to="(600,430)"/>
+    <wire from="(600,430)" to="(670,430)"/>
+    <wire from="(660,320)" to="(660,330)"/>
+    <wire from="(660,320)" to="(730,320)"/>
+    <wire from="(660,370)" to="(670,370)"/>
+    <wire from="(670,410)" to="(670,430)"/>
+    <wire from="(670,430)" to="(740,430)"/>
+    <wire from="(730,320)" to="(730,330)"/>
+    <wire from="(730,320)" to="(870,320)"/>
+    <wire from="(730,370)" to="(740,370)"/>
+    <wire from="(740,410)" to="(740,430)"/>
+    <wire from="(790,460)" to="(810,460)"/>
+    <wire from="(800,370)" to="(820,370)"/>
+    <wire from="(810,390)" to="(810,460)"/>
+    <wire from="(810,390)" to="(820,390)"/>
+    <wire from="(860,380)" to="(870,380)"/>
+    <wire from="(870,320)" to="(870,380)"/>
+  </circuit>
+</project>